Data Hazards 0x30 sub $6 $0 $1 0x34 add $7 $6 $1 ... .. .

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 Präsentation transkript:

Data Hazards 0x30 sub $6 $0 $1 0x34 add $7 $6 $1 ... .. .

Step 3, we calculate $0 - $1 ! ! ! HAZARD ! ! ! OLD VALUE OF $6 IM Reg 0x30 sub $6 $0 $1 IM Reg DM Reg 0x34 add $7 $6 $1 IM Reg DM Reg ! ! ! HAZARD ! ! ! OLD VALUE OF $6

Step 4, we calculate $1 + $6 IM Reg DM Reg IM Reg DM Reg 0x30 sub $6 $0 $1 IM Reg DM Reg 0x34 add $7 $6 $1 IM Reg DM Reg

Step 5, Now we write $6 HAZARD OVER NEW VALUE OF $6 WRITTEN TO REGFILE 0x30 sub $6 $0 $1 IM Reg DM Reg 0x34 add $7 $6 $1 IM Reg DM Reg HAZARD OVER NEW VALUE OF $6 WRITTEN TO REGFILE

Step 2, nop IM Reg DM Reg IM Reg DM Reg IM Reg DM Reg IM Reg DM Reg 0x30 sub $6 $0 $1 IM Reg DM Reg 0x34 nop IM Reg DM Reg IM Reg DM Reg IM Reg DM Reg

Step 3, nop IM Reg DM Reg IM Reg DM Reg IM Reg DM Reg IM Reg DM Reg 0x30 sub $6 $0 $1 IM Reg DM Reg 0x34 nop IM Reg DM Reg 0x38 nop IM Reg DM Reg IM Reg DM Reg

Step 4, add $7 $6 $1 IM Reg DM Reg IM Reg DM Reg IM Reg DM Reg IM Reg 0x30 sub $6 $0 $1 IM Reg DM Reg 0x34 nop IM Reg DM Reg 0x38 nop IM Reg DM Reg 0x3C add $7 $6 $1 IM Reg DM Reg

Step 5, new $6 used IM Reg DM Reg IM Reg DM Reg IM Reg DM Reg IM Reg 0x30 sub $6 $0 $1 IM Reg DM Reg 0x34 nop IM Reg DM Reg 0x38 nop IM Reg DM Reg 0x3C add $7 $6 $1 IM Reg DM Reg

Data Hazards Read After Write Solved by inserting “nop” operations (bubbles) or by hardware “stalling” the pipe

Cost? + Hardware inexpensive - Performance (throughput)

Data Hazards sub $6 $0 $1 add $7 $6 $1 add $7 $7 $6 .. .

We calculate $0 - $1 ! ! ! HAZARD ! ! ! OLD VALUE OF $6 IM Reg DM Reg 0x30 sub $6 $0 $1 IM Reg DM Reg 0x34 add $7 $6 $1 IM Reg DM Reg ! ! ! HAZARD ! ! ! OLD VALUE OF $6

We “forward” the new result 0x30 sub $6 $0 $1 IM Reg DM Reg 0x34 add $7 $6 $1 IM Reg DM Reg HAZARD SOLVED BY “FORWARDING”

0x30 sub $6 $0 $1 0x34 add $7 $6 $1 > 0x38 add $7 $7 $1 ... .. Zero ext. HERE IS THE RESULT Branch logic A ALU 4 B + 31 + Sgn/Ze extend 0x30 sub $6 $0 $1 0x34 add $7 $6 $1 > 0x38 add $7 $7 $1 ... ..

0x30 sub $6 $0 $1 0x34 add $7 $6 $1 > 0x38 add $7 $7 $1 ... .. Zero ext. WE NEED IT HERE Branch logic A ALU 4 B + 31 + Sgn/Ze extend 0x30 sub $6 $0 $1 0x34 add $7 $6 $1 > 0x38 add $7 $7 $1 ... ..

0x30 sub $6 $0 $1 > 0x34 add $7 $6 $1 ... .. DATA WORD add $7 $6 $1 A DATA WORD B 0x30 sub $6 $0 $1 > 0x34 add $7 $6 $1 ... ..

0x30 sub $6 $0 $1 > 0x34 add $7 $6 $1 ... .. REG NR add $7 $6 $1 = A B REG NR 0x30 sub $6 $0 $1 > 0x34 add $7 $6 $1 ... ..

0x30 sub $6 $0 $1 0x34 add $7 $6 $1 0x38 add $7 $7 $6 Zero ext. Branch logic A ALU 4 B + 31 + Sgn/Ze extend 0x30 sub $6 $0 $1 0x34 add $7 $6 $1 0x38 add $7 $7 $6 > 0x3C sw $5 4($0)

0x30 sub $6 $0 $1 0x34 add $7 $6 $1 > 0x38 add $7 $7 $6 ... .. = A ALU B = 0x30 sub $6 $0 $1 0x34 add $7 $6 $1 > 0x38 add $7 $7 $6 ... ..

0x30 sub $6 $0 $1 0x34 add $7 $6 $1 > 0x38 add $7 $7 $6 ... .. = = A ALU B = = 0x30 sub $6 $0 $1 0x34 add $7 $6 $1 > 0x38 add $7 $7 $6 ... ..

Data Hazards sub $6 $0 $1 add $6 $6 $1 add $7 $6 $1 .. .

0x30 sub $6 $0 $1 0x34 add $6 $6 $1 > 0x38 add $7 $6 $1 ... .. = = A ALU B = = 0x30 sub $6 $0 $1 0x34 add $6 $6 $1 > 0x38 add $7 $6 $1 ... ..

Performance No “Bubbles” or “Stalls” increased throughput But did we change the critical path? Topological sort Static timing analysis

Zero ext. = = Branch logic A ALU 4 B + = = 31 + Sgn/Ze extend

Forwarding Logic W Reg # DRD/DWT W >=1 = Reg # = & & DATA DATA

Critical path ALU? Zero ext. = = Branch logic A ALU 4 B + = = 31 + A ALU 4 B + = = 31 + Sgn/Ze extend

Critical path DATA MEMORY? Zero ext. = = Branch logic A ALU 4 B + = = 31 + Sgn/Ze extend

All problems solved? NO, what will happen if...... lw $6 $0($1) add $4 $6 $1 add $7 $6 $2

OK, “DM” to “DE” IM Reg DM Reg IM Reg DM Reg IM Reg DM Reg 0x30 lw $6 $0($1) IM Reg DM Reg IM Reg DM Reg 0x34 add $4 $6 $1 0x38 add $7 $6 $2 IM Reg DM Reg

“DM” to “EX” ? IM Reg DM Reg IM Reg DM Reg IM Reg DM Reg 0x30 lw $6 $0($1) IM Reg DM Reg IM Reg DM Reg 0x34 add $4 $6 $1 0x38 add $7 $6 $2 IM Reg DM Reg