(c) 2006 Christian V. Madritsch, FH Kärnten Diskrete Mathematik und Algorithmen Dipl.-Ing. (FH) Christian V. Madritsch University of Applied Science Electronics and Equipment Engineering

(c) 2006 Christian V. Madritsch, FH Kärnten Übersicht CPU Architekturen –Pentium Architektur Programmierbeispiel –Integer Lösung mit Assemblercode –Floating Point Lösung mit Assemblercode –C167 Architektur Programmierbeispiel –Integer Lösung mit Assemblercode –Floating Point Lösung mit Assemblercode Diskussion

(c) 2006 Christian V. Madritsch, FH Kärnten intel Pentium Architektur

(c) 2006 Christian V. Madritsch, FH Kärnten Integer Calculation (i) void main (void){ int f1, f2, erg; f1 = ; f2 = 2.7; erg = f1 + f2; while(1){ erg = f1 + f2; if(erg > 2) f1 = 0; else f2 = 0; }

(c) 2006 Christian V. Madritsch, FH Kärnten Integer Calculation (ii) 1: void main (void){ 2: int f1, f2, erg; 3: f1 = ; mov dword ptr [ebp-4],3 4: f2 = 2.7; F mov dword ptr [ebp-8],2 5: erg = f1 + f2; mov eax,dword ptr [ebp-4] add eax,dword ptr [ebp-8] C mov dword ptr [ebp-0Ch],eax 6: while(1){ F mov ecx, test ecx,ecx je main+59h ( ) 7: erg = f1 + f2; mov edx,dword ptr [ebp-4] B add edx,dword ptr [ebp-8] E mov dword ptr [ebp-0Ch],edx 8: if(erg > 2) cmp dword ptr [ebp-0Ch], jle main+50h ( ) 9: f1 = 0; mov dword ptr [ebp-4],0 10: else E jmp main+57h ( ) 11: f2 = 0; mov dword ptr [ebp-8],0 12: } jmp main+2Fh ( f)

(c) 2006 Christian V. Madritsch, FH Kärnten Floating Point Calculation (i) void main (void){ double f1, f2, erg; f1 = ; f2 = 2.7; erg = f1 + f2; while(1){ erg = f1 + f2; if(erg > 2) f1 = 0; else f2 = 0; }

(c) 2006 Christian V. Madritsch, FH Kärnten Floating Point Calculation (ii) 1: void main (void){ 2: double f1, f2, erg; 3: f1 = ; mov dword ptr [ebp-8],0C083126Fh F mov dword ptr [ebp-4],400921CAh 4: f2 = 2.7; mov dword ptr [ebp-10h], Ah D mov dword ptr [ebp-0Ch], h 5: erg = f1 + f2; fld qword ptr [ebp-8] fadd qword ptr [ebp-10h] A fstp qword ptr [ebp-18h] 6: while(1){ D mov eax, test eax,eax je main+7Fh ( f) 7: erg = f1 + f2; fld qword ptr [ebp-8] fadd qword ptr [ebp-10h] C fstp qword ptr [ebp-18h] 8: if(erg > 2) F fld qword ptr [ebp-18h] fcomp qword ptr ( )] fnstsw ax A test ah,41h D jne main+6Fh ( f) 9: f1 = 0; F mov dword ptr [ebp-8], mov dword ptr [ebp-4],0 10: else D jmp main+7Dh ( d) 11: f2 = 0; F mov dword ptr [ebp-10h], mov dword ptr [ebp-0Ch],0

(c) 2006 Christian V. Madritsch, FH Kärnten Infineon C167-CS Block Diagram

(c) 2006 Christian V. Madritsch, FH Kärnten C166 Core Block Diagram 16-Bit CPU –Van Neumann 4-Stage Pipeline 80ns Instruction 25MHz –400ns Multiplication (16x16bit), –800ns Division (32/16bit) No native Floating Point support

(c) 2006 Christian V. Madritsch, FH Kärnten Keil C166 Development System Data TypeBitsBytesValue Range bit1 0 or 1 signed char to +127 unsigned char810 to 255 enum8 / 161 or to +127 or to signed short to unsigned short1620 to signed int to unsigned int1620 to signed long to unsigned long3240 to float324± E-38 to ± E+38 double648±1.7E-308 to ±1.7E+308 sbit1 0 or 1 sfr1620 to 65535

(c) 2006 Christian V. Madritsch, FH Kärnten Integer Calculation (i) void main (void){ int f1, f2, erg; f1 = ; f2 = 2.7; erg = f1 + f2; while(1){ erg = f1 + f2; if(erg > 2) f1 = 0; else f2 = 0; }

(c) 2006 Christian V. Madritsch, FH Kärnten Integer Calculation (ii) 1: void main (void) { 2: int f1, f2, erg; 3: f1 = ; E035 MOV R5,#0x03 4: f2 = 2.7; E027 MOV R7,#0x02 5: erg = f1 + f2; E056 MOV R6,#0x05 6: while(1){ 7: erg = f1 + f2; F065 MOV R6,R A 0067 ADD R6,R7 8: if(erg > 2) C 4862 CMP R6,# E BD02 JMPR CC_SLE,0x : f1 = 0; 10: else E005 MOV R5,#0x DFA JMPR CC_UC,0x : f2 = 0; E007 MOV R7,#0x00 12: } DF8 JMPR CC_UC,0x010008

(c) 2006 Christian V. Madritsch, FH Kärnten Floating Point Calculation (i) void main (void){ double f1, f2, erg; f1 = ; f2 = 2.7; erg = f1 + f2; while(1){ erg = f1 + f2; if(erg > 2) f1 = 0; else f2 = 0; }

(c) 2006 Christian V. Madritsch, FH Kärnten Floating Point Calculation (ii) 1: void main (void) { 2: double f1, f2, erg; CC 2804 SUB R0,#4 3: f1 = ; CE E6F4560E MOV R4,#0x0E D2 E6F54940 MOV R5,#0x D6 B840 MOV [R0],R D8 C MOV [R0+#0x0002],R5 4: f2 = 2.7; DC E6FECDCC MOV R14,#0xCCCD E0 E6FF2C40 MOV R15,#0x402C 5: erg = f1 + f2; E4 E6FC92ED MOV R12,#0xED E8 E6FDBA40 MOV R13,#0x40BA 6: while(1){ 7: erg = f1 + f2; EC A840 MOV R4,[R0] EE D MOV R5,[R0+#0x0002] F2 F06E MOV R6,R F4 F07F MOV R7,R F6 CA CALLA CC_UC,?C_FPADD(0x10006)C_FPADD FA F0C4 MOV R12,R FC F0D5 MOV R13,R5 8: if(erg > 2) FE E006 MOV R6,#0x E6F70040 MOV R7,#0x CA00EA00 CALLA CC_UC,?C_FPCMP(0x100EA) BD05 JMPR CC_SLE,0x : f1 = 0; 10: else A E004 MOV R4,#0x C B840 MOV [R0],R E C MOV [R0+#0x0002],R DEC JMPR CC_UC,0x0101EC 11: f2 = 0; E00E MOV R14,#0x E00F MOV R15,#0x00 12: } DE9 JMPR CC_UC,0x0101EC

(c) 2006 Christian V. Madritsch, FH Kärnten C167FPS.LIB (i) FP_ADD –calls: FP_GETOPN –calls: FG_XSUB calls: FP_OPRSL –calls: FP_RSLNR –calls: FP_NOERR

(c) 2006 Christian V. Madritsch, FH Kärnten C167FPS.LIB (ii) ?C_FPADD: CA CALLA CC_UC,?C_FPGETOPN(0x10168)C_FPGETOPN A 46FAFF00 CMP R10,#0x00FF E 3D10 JMPR CC_NZ,0x F78000 CMP R7,#0x D13 JMPR CC_NZ,0x01003C F9FF00 CMP R9,#0x00FF A 3D07 JMPR CC_NZ,0x01002A C 46F58000 CMP R5,#0x D0D JMPR CC_NZ,0x01003C AF2F280 BCMP R2.0,R D0A JMPR CC_N,0x01003C D0B JMPR CC_UC,0x A 4AF2F280 BMOV R2.0,R E 0D08 JMPR CC_UC,0x F9FF00 CMP R9,#0x00FF D07 JMPR CC_NZ,?C_FPXSUB(0x10044)C_FPXSUB F58000 CMP R5,#0x A 2D02 JMPR CC_Z,0x C EA008E01 JMPA CC_UC,?C_FPNANRSL(0x1018E) EA JMPA CC_UC,?C_FPINFRSL(0x10196) 20 LOCs

(c) 2006 Christian V. Madritsch, FH Kärnten C167FPS.LIB (iii) ?C_FPGETOPN: F095 MOV R9,R A 5C19 SHL R9,#0x C 4A88F210 BMOV R2.0,C C89 SHR R9,#0x A88F537 BMOVN R5.7,Z E003 MOV R3,#0x E10B MOVB RH5,#0x A F0A7 MOV R10,R C 5C1A SHL R10,#0x E 4A88F218 BMOV R2.8,C C8A SHR R10,#0x A88F737 BMOVN R7.7,Z E008 MOV R8,#0x A E10F MOVB RH7,#0x C CB00 RETRET 15 LOCs

(c) 2006 Christian V. Madritsch, FH Kärnten C167FPS.LIB (iv) ?C_FPXSUB: A0 CMP R10,# D06 JMPR CC_Z,0x CMP R9,# A 3D06 JMPR CC_NZ,0x C F057 MOV R5,R E F046 MOV R4,R F09A MOV R9,R F145 MOVB RL2,RH EA00B801 JMPA CC_UC,?C_FPNOERR(0x101B8) A CMP R9,R A 9D0C JMPR CC_NC,0x C F015 MOV R1,R E F057 MOV R5,R F071 MOV R7,R F014 MOV R1,R F046 MOV R4,R F061 MOV R6,R F019 MOV R1,R A F09A MOV R9,R C F0A1 MOV R10,R E F124 MOVB RL1,RL F145 MOVB RL2,RH F152 MOVB RH2,RL F019 MOV R1,R A SUB R1,R D0B JMPR CC_Z,0x A 46F11900 CMP R1,#0x E 9DEA JMPR CC_NC,0x AF6F80F BOR R8.15,R C16 SHR R6,#0x01 70 LOCs AF7F60F BMOV R6.15,R A 7C17 SHR R7,#0x C 2811 SUB R1,# E 3DF8 JMPR CC_NZ,0x AF2F280 BCMP R2.0,R D0E JMPR CC_N,0x0100B ADD R3,R ADDC R4,R A 1057 ADDC R5,R C 9AF50780 JNB R5.8,0x0100AE A ADD R9,# A2 5AF4F30F BOR R3.15,R A6 7C14 SHR R4,#0x A8 4AF5F40F BMOV R4.15,R AC 7C15 SHR R5,#0x AE EA00A201 JMPA CC_UC,?C_FPOPRSL(0x101A2)// jumpC_FPOPRSL B SUB R3,R B SUBC R4,R B SUBC R5,R B8 EA20C601 JMPA CC_Z,?C_FPZERRSL(0x101C6) BC 9D07 JMPR CC_NC,0x0100CC BE B140 CPLB RL C CPL R C CPL R C CPL R C ADD R3,# C ADDC R4,# CA 1850 ADDC R5,# CC 8AF5EF70 JB R5.7,0x0100AE D ADD R3,R D ADDC R4,R D ADDC R5,R D SUB R9,# D8 8AF50570 JB R5.7,0x0100E DC 0044 ADD R4,R DE 1055 ADDC R5,R E SUB R9,# E2 9AF5FB70 JNB R5.7,0x0100DC E6 EA00AE01 JMPA CC_UC,?C_FPRSLNR(0x101AE)

(c) 2006 Christian V. Madritsch, FH Kärnten C167FPS.LIB (v) ?C_FPOPRSL: A2 9AF304F0 JNB R3.15,?C_FPRSLNR(0x101AE) A ADD R4,# A8 19A0 ADDCB RL5,# AA 9D01 JMPR CC_NC,?C_FPRSLNR(0x101AE) AC 0891 ADD R9,#1 ?C_FPRSLNR: AE 4890 CMP R9,# B0 BD0A JMPR CC_SLE,?C_FPZERRSL(0x101C6) B2 46F9FF00 CMP R9,#0x00FF B6 DDEF JMPR CC_SGE,?C_FPINFRSL(0x10196) ?C_FPNOERR: B8 66F57F00 AND R5,#0x007F BC 5C79 SHL R9,#0x BE 4AF2F90F BMOV R9.15,R C OR R5,R C4 CB00 RET 14 LOCs

(c) 2006 Christian V. Madritsch, FH Kärnten Diskussion Der C166 Core unterstützt nur Integer (16-Bit) Operationen. Floating Point (float, double) Operationen werden in Software nachgebildet. Daraus folgt: –Floating Point Operationen sind (durchschnittlich) um den Faktor 100 langsamer als Integer Operationen –Der Speicherplatzbedarf für Daten und Programm ist um den den Faktor größer als bei Integer Operationen Dies relativiert sich, da die Bibliothek C167FPS.lib nur einmal eingebunden wird