Front end low Temperature

Präsentation zum Thema: "Front end low Temperature"—  Präsentation transkript:

1 Front end electronics @ low Temperature
Parallel processing of analog signals ■ Time continuous filtering ■ Time discrete filtering 2. Readout strategies ■ Multiplexing ■ Readout chain per channel 3. Complexity of frontend ASICS ■ Preamplification ■ Signal Shaping ■ S&H and further amplification ■ Multiplexer ■ ADC, etc. 4. MPE, potential contributions ■ ASICs 30 K to R.T. ■ Test facilities Lothar Strüder SRON, Utrecht

2 The XEUS WFI Lothar Strüder SRON, Utrecht

3 Prototype matrices Ceramic Hybrid
64 x 64 pixel arrays with 75 x 75 mm2 pixel size Complete set of control & readout electronics Ceramic Hybrid Lothar Strüder SRON, Utrecht

4 Energy resolution of DEPMOSFET arrays
T = - 35o C Energy resolution: 126 eV Mn-Ka Line corresponding to 5.8 e- 400 frames per second Lothar Strüder SRON, Utrecht

5 World record of room temperature spectroscopy
τ = 6 µs, continuous signal shaping, single pixel with 75 x 75 µm 2 Lothar Strüder SRON, Utrecht

6 Imaging Illumination from backside Baffle: 300 mm thick silicon
Minimal structure size: 150 mm Exposure ca frames Readout speed: 400 fps Contour plot from ADU maps Hitmap with 100 ADU threshold Lothar Strüder SRON, Utrecht

7 Frontend ASIC‘s – CAMEX block diagram
Lothar Strüder SRON, Utrecht

8 Signal Filtering - CDS weighting function
Lothar Strüder SRON, Utrecht

9 Signal Filtering – triangular shaping (integration)
What filter function leads to the best SNR ? with a given measurement time with real detector signals with real noise contributions with a practical ASIC implementation (power constrain, ktc reset noise ...) Lothar Strüder SRON, Utrecht

10 Signal Filtering – CDS & shaping time
Lothar Strüder SRON, Utrecht

11 Frontend ASIC‘s in Use CMX132 (CCD) CMXDUO (CCD) CMX64G (DEPFETs)
SWITCHER II (DEPFETs) CURO (DEPFETs) DRAGO-ASIC (SDD) SYS48 (SDD) developed in cooperation with Politecnico di Milano & INFN University Bonn Ingenieurbuero Buttler Lothar Strüder SRON, Utrecht

12 Test facilities at the MPE
1. Test facility PANTER Length: 130 m, big vacuum vessel (4 x 4 x 9 m3) Energy bandwidth: 178 eV to 17.5 keV Flat fields and pencil beams High monocromacy (transmission gratings, crystal monocromater ...) Lothar Strüder SRON, Utrecht

13 Test facilities at MPE 2. The test facilities PUMA ROESTI CALIFA
Lothar Strüder SRON, Utrecht

14 Potential MPE contributions to the European cryogenic activities
1. Cooperation in the field of cryogenic frontend electronics (ASIC preamp, shaper, S&H, ADC, DAQ, Sequencing, ...) 2. Testing of ``cold electronics´´ and test of devices and systems (supplying test facilities) 3. MPE does not have plans to develop own cryogenic detectors, but . . . Lothar Strüder SRON, Utrecht

15 Frontend ASIC‘s - FTD ASIC
The FTD ASIC is a multichannel readout ASIC For use with asynchronous detectors like SDD‘s The ASIC targets detectors with a „small“ number of pixels (like multichannel drift detectors) Includes CRRC shapers in parallel architecture Variable shaping time allows application specific trade-off between count rate and noise MCDRIFT FTD analog output signals Lothar Strüder SRON, Utrecht

16 Frontend ASIC‘s - CAMEX
CAMEX is a multichannel readout ASIC For use with synchronous detectors like CCD and DEPFET PIXEL Filtering carried out in parallel architecture S&H stage and output serialiser Integrated programable timing generator (modular and low pincount) Cascadeable CCD PHI signals clk CMX CMX analog output signals Lothar Strüder SRON, Utrecht